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基于Toshiba TC35676,TMPM341,TZ2102的Smart Game在线游戏之实体化方案
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拍明
原标题：基于Toshiba TC35676,TMPM341,TZ2102的Smart Game在线游戏之实体化方案
鉴于因老化产生的认知功能衰退, 一旦老人产生记忆力退化, 注意力无法集中等现象, 通常已无法根治且影响自身生活自理之外, 也对家庭亲属及社会造成沉重负担, 故老年人认知能力衰退的预防日趋受重视。
本方案结合了在线博弈游戏之便利性与实体游戏之真实性, 将在线游戏拟真化. 方案中充分应用Toshiba solution，分为Baseboard与Stone架构。Baseboard为主控端使用Toshiba TZ2102控制游戏的相关行为与显示，架构图如下:
Stone部分藉由BLE低功耗及电子纸省电特色与东芝BLE Scatternet piconet protocal加上无线充电, 在下棋时可以边玩边充电，Stone详细架构如下:
目前Stone已经内存黑白棋，麻将，扑克与英文字等图形，可以参考实际显示图如下:
整个方案互动模式由TZ2102 baseboard主控整个游戏，游戏者可将棋子(Stone)放置于TZ2102显示的棋盘格子内，TZ2102将透过WPC ID定位功能获取棋子实际在棋盘相对位置再依照游戏规格使用Toshiba BLE scatternet protocol技术控制棋子花色变化，最后决算胜利方
场景应用图
产品实体图
展示板照片
方案方块图
核心技术优势
◆ 利用大型TZ2101 Gateway显示在31.2” EPD上
◆ 利用TC35676 BLE scatternet protocol传递指令控制对应游戏的牌型
◆ 利用TMPM341控制改变EPD上显示的牌型
方案规格
◆本方案的蓝牙通讯协议层(Protocol stack)除了支持基本BLE标准协议(Profile)之外，也预烧了东芝自行开发之Scatternet service韧体。当每台Stone一开机，会被事先指定成根节点(Root node)的Stone做为起点，接着陆续连接其它Stone，自动形成Scatternet网络。
◆ BLE 服务器安装了一款 Scatternet 主机程序。此程序提供了GUI操作画面，使用者能观察每一台Stone的连接状态以及整体Scatternet路径信息外，也可以传送任何2byte的指令到网络内任一个或全部的Stone。
◆ BLE 服务器由 Notification机制能得知指令是否下达成功，除此之外，Scatternet 的每节点还会定时巡视与下游之间的连接状态，一旦发现失去讯号，讯息就会往上游推送。最上游的服务器因此能确保Scatternet通讯的成功与否。
技术文档
| 类别 | 标题 | 档案 |
|---|---|---|
| 硬件 | BOM | |
| 硬件 | Schematics | |
| 硬件 | Whitebook |
【TC35676】
Bluetooth® Single-Chip Controller for Bluetooth Low Energy (4.1) With Built-In Flash ROM
The TC35676 is a highly integrated RFCMOS Bluetooth device with built-in 192K Flash ROM, which supports the new Bluetooth Low Energy (BLE) 4.1 standard. TC35676 is suitable for ultra-low power portable products. The device comes with embedded BLE stack and GATT profile. Toshiba has tested the Bluetooth interoperability extensively and performed Bluetooth Qualification Expert (BQE) qualification.
Toshiba Bluetooth® Silicon and Software Brochure (pdf 4.9MB)
Key Benefits
Flexible system architectures through:
Embedded Bluetooth profile model (API over host UART)
Stand alone model (with embedded Bluetooth stack and profile, no host needed)
Bluetooth qualified embedded BLE stack and GATT profile for easy Bluetooth product qualification
Ultra-low bill of materials due to very few external components:
No external memory is needed, on-chip Flash and RAM stores small to medium size application code and data
System integration is simplified by various on-chip peripherals
Only a small RF circuit is necessary due to built-in discrete components
Supports over-the-air (OTA) update of system software
The device can operate at voltages between 1.8V and 3.6V making it suitable for use with various battery types such as coin cell, AAA, or AA
Various sleep modes and clock options to optimize power consumption
QFN40 package allows small and cheap form factor designs
TC35676 Features
Bluetooth Low Energy (BLE) 4.1 compliant
Supports BLE GAP central and peripheral mode
Embedded 192KB Flash Memory and internal RAM for application code, data patches
On-chip balun, antenna switch, LNA, DC-DC converter
Operational Voltage: 1.8V to 3.6V
BLE peak power consumption: 5.9mA (depends on selected clocking scheme and data mode)
Deep sleep mode: 0.1µA; sleep mode 5µA
Peak current in operation mode: 5.9mA
Transmitter Output Power: 0dBm to -20dBm (4dB steps)
RX Sensitivity: -92.5dBm (typ.)
Operating Temperature Range: -40°C to 85°C
Package: 40pin QFN 6mm x 6mm 0.5mm ball pitch or 5mm x 5mm 0.4mm ball pitch, height 0.9mm
Profiles: GATT (Generic Attribute Profile), including server and client functions
Interfaces: UART (2), SPI & I2C interface, PWM output (3channels), ADC (4 channels),
15 programmable IO
TC35676 Block Diagram
Stand Alone Application Example
TZ2102XBG
ApP Lite
Description
| Feature | Arm® Cortex®-A9 Clock:600MHz(Max) / DDR3/3L I/F, 1MB SRAM embeded / Graphics Acceleration, Camera input, LCD controller / Low power system technology, Long-term data retention / USB2.0/Ether |
|---|---|
| Application Scope | Amusement system / Environment data mining system / Smart home appliance / User interface system |
| RoHS Compatible Product(s) (#) | Available |
| I/O | Camera input (Parallel) / DDR3/DDR3L / Ether / External Bus / I2C / I2S / LCD Output (Parallel) / SDIO/e∙MMC™ / SPI / UART / USB2.0 |
| CPU | Arm® Cortex®-A9 MPCore |
| FPU | Available |
| RAM | 1MByte SRAM / 32kByte SRAM(Back-up) |
| graphic engine | TOSHIBA original graphics accelerator |
| Cache | L1D Cache: 16kByte / L1I Cache: 16kByte / L2 Cache:128kByte |
| high speed interface controller | USB2.0 host interface / USB2.0 device interface / 10/100 Ethernet MAC |
| DRAM controller | DDR3/DDR3L×16bit |
| LCD controller | WVGA(800×480) 60fps, 24bit Parallel I/F |
| Expansion bus I/F | Address: 27bit, Data:32bit |
| Peripherals | DMA controller / Timer/counter / RTC |
| Peripheral I/F | Camera I/F, UART×4, I2C×4, I2S×2, SPIM×7, SPIB×2,PWM×6, 12bitADC×4, SDIO×3, eMMCx1, GPIO |
Package Information
| Toshiba Package Name | P-LFBGA310-1616-0.80-001 |
|---|---|
| Pins | 310 |
| Package size | 16mm x 16mm x 1.6mm |
| Pin pitch | 0.8mm |
| Characteristics | Symbol | Rating | Unit |
|---|---|---|---|
| Operating frequency(max) | 600 | MHz | |
| operating temperature(Tc) | -20 to 75 | ℃ |
Electrical Characteristics
| Characteristics | Symbol | Condition | Value | Unit |
|---|---|---|---|---|
| power supply voltage | - | I/O: 3.3V Core: 1.1V DRAM(DDR3L): 1.35+/-0.05V DRAM(DDR3): 1.50+/-0.05V |
TMPM341FDXBGNot Recommended for New Design
TX03
Description
| Description | 32-bit high functionality, low-power microcontroller based on Cortex™-M3 core with high-precision PPG output ideal for motor control, 12-bit AD converter and 10-bit DA controller with enhanced analog performance suitable for lenses of camera. NANO FLASH™ |
|---|---|
| RoHS Compatible Product(s) (#) | Available |
Arm and Cortex are trademarks or registered trademarks of Arm Limited in the US and other countries.
NANO FLASH is a trademark of Toshiba Corporation.
Package Information
| Toshiba Package Name | P-TFBGA113-0606-0.50A4 |
|---|---|
| Package Image |  |
| Pins | 113 |
| Mounting | Surface Mount |
Please refer to the link destination to check the detailed size.
Description
| Property | Value | Unit |
|---|---|---|
| Group Name | M340 | - |
| Number of bits | 32 | bit |
| ROM size | 512 | Kbyte |
| ROM type | Flash | - |
| RAM size | 32 | Kbyte |
| DMA controllers | 4 | ch |
| internal data bus width | 32 | bit |
| external data bus width | 16 | bit |
| I/O Port | 86 | port |
| UART/SIO | 5 | ch |
| I2C/SIO | 2 | ch |
| Timer/counter(16bit) | 10 | ch |
| high-resolution 16-bit timer/PPG output | 2 | ch |
| A/D converters(12bit) | 15 | ch |
| D/A converters(10bit) | 2 | ch |
| watchdog timer | Available | - |
| Oscillation frequency detector | Available | - |
| On-chip debug function | Available | - |
| JTAG (Boundary-Scan) | Available | - |
| trace func | Available | - |
| Clock gear function | Available | - |
| Interrupt controllers | 12 | pins |
| CS/WAIT controller | 2 | ch |
| Multiply and accumulation unit | Available | - |
| Sync. Serial Interface | 1 | ch |
If the voltage range is less than 2.7V, only some of the built-in functions such as external interface and SSP can be used.
| Supply Voltage (V) | Operation Frequency (MHz) | Operating Temp (degC) | Minimum instruction execution time (µsec) |
|---|---|---|---|
| 1.65 to 3.6 | 1 to 54 | -40 to 85 | 0.0185 |
责任编辑：David
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