原标题：ADI AD9164高性能16位DAC和DDS解决方案

　　ADI公司的AD9164是高性能16位数模转换器(DAC)和直接数字频率合成器(DDS)，支持最高达6 GSPS更新速率.DAC内核基于一个四通道开关结构配合2倍插值滤波器，使DAC的有效更新速率在某些模式下高达12 GSPS;而DDS由一组32个32位数控振荡器(NCO)组成,各带相位累加器,能使军用和商用雷达设计人员实现高分辨率雷达成像,同时减少解决方案器件数量,频率范围从音频到6 GHz,主要用在宽带通信系统,DOCSIS 3.1电缆调制解调器终端系统(CMTS)/视频点播(VOD)/边沿正交幅度调制(EQAM),无线通信基础设施以及W-CDMA, LTE, LTE-A和点对点.本文介绍了AD9164产品亮点和主要特性,功能框图,以及评估板AD916x-FMCx-EBZ EVB主要特性,框图,电路图和材料清单.

　　The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.

　　The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.

　　In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastruc-ture compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.

　　An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in an 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.

　　AD9164产品亮点:

　　1. High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz.

　　2. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed.

　　3. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.

　　AD9164主要特性:

　　DAC update rate up to 12 GSPS (minimum)

　　Direct RF synthesis at 6 GSPS (minimum)

　　DC to 2.5 GHz in baseband mode

　　DC to 6 GHz in 2× nonreturn-to-zero (NRZ) mode

　　1.5 GHz to 7.5 GHz in Mix-Mode

　　Bypassable interpolation

　　2×,3×,4×,6×,8×,12×,16×,24×

　　Excellent dynamic performance

　　AD9164应用:

　　Broadband communications systems

　　DOCSIS 3.1 cable modem termination system (CMTS)/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM)

　　Wireless communications infrastructure

　　W-CDMA, LTE, LTE-A, point to point

　　图1.AD9164功能框图

　　评估板AD916x-FMCx-EBZ EVB

　　The AD916x-FMCx-EBZ EVB connects to an ADS7-V1 or ADS7-V2 Pattern Generator to allow for quick evaluation of the AD916x, a high-speed, RF Digital to Analog converter (RF DAC). The ADS7 automatically formats the data and sends it to the AD916x EVB, simplifying evaluation of the device. The Evaluation Board (EVB) runs from the FMC power supply. The AD916x-FMCx-EBZ EVB can be driven by an external clock or the on-board clock, the ADF4355, as shown in Figure 1. There is a single pole, double throw (SPDT) switch on the board for selecting the clock source. Figure 2 is an image of the top side of the AD916x-FMCx-EBZ. The board includes a clock buffer, the AD9508, which provides the reference clock and SYSREF to the ADS7 and the SYSREF signal to DAC.

　　To operate the evaluation boards, the user must attach the board to a compatible FMC carrier board, such as those provided by FPGA vendors. Analog Devices produces an FPGA carrier called the ADS7-V2, which serves as a digital pattern generator or data source as well as the power supply for the boards. The ad9162 and AD9164 boards have an option to be powered from a lab power supply when used in a special NCO-only mode. This operation is described in more detail in the User’s Guide. The user must be able to observe the DAC output on a spectrum analyzer. A low noise clock source is provided on the evaluations boards, the ADF4355 PLL, and an option exists for the user to supply a low jitter external sine or square wave clock as a clock source instead. The evaluation board comes with software, called ACE, which allows the user to program the SPI port. Via the SPI port, the DUT (and clock circuitry) can be programmed into any of its various operating modes.

　　图2.评估板AD916x-FMCx-EBZ EVB框图

　　图3.评估板AD916x-FMCx-EBZ EVB外形图