方案介绍：

产品特点

• 支持宽范围的指纹传感器 (DPI / NEXT 等)

• 宽范围输出接口支持 (UART，SPI，JTAG，USB 等)

• 高性能 STM MCU

• 通过 第三方 合作伙伴的识别算法

系统

• 意法半导体：STM32F411

• DPI：TCS2SS/NEXT：NB-1011-S

• 华邦：W25x40

目标应用

• 智能门锁

• 移动销售终端设备

• 指纹收集器

STM32F411 

The STM32F411 microcontrollers are part of the STM32 Dynamic Efficiency™ lines. These devices are the entry level to the High Performance F4 Series and offer the best balance of dynamic power consumption (in run mode) and processing performance, while integrating a high number of added-value features in packages as small as 3 x 3 mm.

The STM32F411 MCUs deliver the performance of Cortex®-M4 core with floating point unit, running at 100 MHz, while achieving outstandingly low power consumption values in run and stop modes.

With a new, Batch Acquisition Mode (BAM), optimizing power consumption for data batching, the STM32F411 takes the Dynamic Efficiency to a new level. This BAM allows exchanging batches of data through communication peripherals with the rest of the device (including the CPU) being in power saving mode.

    Performance: At 100 MHz, the STM32F411 delivers 125 DMIPS/339 CoreMark performance executing from Flash memory, with 0-wait states using ST’s ART Accelerator. The DSP instructions and the floating point unit enlarge the range of addressable applications.

    Power efficiency: ST’s 90 nm process, ART Accelerator and the dynamic power scaling enables the current consumption when executing from Flash memory to be as low as 100 µA/MHz. In Stop mode, the power consumption can be as low as 10 µA.

    Integration: The STM32F411 devices carry 256 to 512 Kbytes of Flash and up to 128 Kbytes of SRAM.

    The available packages range from 49 to 100 pins.

        3x USARTs running at up to 12.5 Mbit/s,

        5x SPI (muxed with I2S) running at up to 50 Mbit/s,

        3x I²C up to 1Mbps

        1x SDIO running at up to 48MHz and available on all packages,

        1x USB 2.0 OTG full speed,

        2x full duplex I²S up to 32-bit/192KHz,

        3x simplex I²S up to 32-bit/192KHz,

        12-bit ADC reaching 2.4 MSPS,

        11 timers, 16- and 32-bit, running at up to 100 MHz

W25X20

1. GENERAL DESCRIPTION  

The W25X10 (1M-bit), W25X20 (2M-bit), W25X40 (4M-bit) and W25X80 (8M-bit) Serial Flash memories provide a storage solution for systems with limited space, pins and power. The 25X series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code download applications as well as storing voice, text and data. The devices operate on a single 2.7V to 3.6V power supply with current consumption as low as 5mA active and 1µA for power-down. All devices are offered in space-saving packages.   The W25X10/20/40/80 array is organized into 512/1024/2048/4096 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time using the Page Program instruction. Pages can be erased in groups of 16 (sector erase), groups of 256 (block erase) or the entire chip (chip erase). The W25X10/20/40/80 has 32/64/128/256 erasable sectors and 2/4/8/16 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.)   The W25X10/20/40/80 supports the standard Serial Peripheral Interface (SPI), and a high performance dual output SPI using four pins: Serial Clock, Chip Select, Serial Data I/O and Serial Data Out. SPI clock frequencies of up to 75MHz are supported allowing equivalent clock rates of 150MHz when using the Fast Read Dual Output instruction. These transfer rates are comparable to those of 8 and 16-bit Parallel Flash memories.   A Hold pin, Write Protect pin and programmable write protect, with top or bottom array control features, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification. 

 2. FEATURES • Family of Serial Flash Memories  – W25X10: 1M-bit / 128K-byte (131,072) – W25X20: 2M-bit / 256K-byte (262,144) – W25X40: 4M-bit / 512K-byte (524,288) – W25X80: 

8M-bit / 1M-byte (1,048,576) – 256-bytes per programmable page  – Uniform 4K-byte Sectors / 64K-byte Blocks • SPI with Single or Dual Outputs  – Clock, Chip Select, Data I/O, Data Out – Optional Hold function for SPI flexibility  • Data Transfer up to 150M-bits / second – Clock operation to 75MHz  – Fast Read Dual Output instruction – Auto-increment Read capability  • Flexible Architecture with 4KB sectors – Sector Erase (4K-bytes) – Block Erase (64K-byte)  – Page program up to 256 bytes <2ms – Up to 100,000 erase/write cycles – 20-year retention  • Low Power Consumption, Wide Temperature Range  – Single 2.7 to 3.6V supply  – 5mA active current, 1µA Power-down (typ) – -40° to +85°C operating range  • Software and Hardware Write Protection – Write-Protect all or portion of memory – Enable/Disable protection with /WP pin – Top or bottom array protection  • Space Efficient Packaging  – 8-pin SOIC 150-mil (W25X10/20/40) – 8-pin SOIC 208-mil (W25X40/80)  – 8-pin PDIP 300-mil (W25X10/20/40/80) – 8-pin WSON 6x5-mm (W25X10/20/40/80)