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基于GPS MSB2531A汽车电子解决方案

2016-09-21
类别:汽车电子
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文章创建人 拍明

方案详情

一.   概述: 

MSB2531A主要用来做便携GPS导航解决方案,主芯片规格为ARM Cortex-A7 32-bit RISC CPU,800MHz,内置三路LDO, 两路DC/DC,充电管理. GPS BaseBand, FM Transmitter, Class-D Amplifier, 立体声耳机驱动;DRAM memory支持16-bit LPDDR和8-bit DDR3, NAND interface支持i-NAND.Movi-NAND,SLC/MLC NAND FLASH,Up to 60-bit ECC; 支持DGPST和WAAS. 

二.   方案功能特点: 

1.显示界面:符合用户的基本使用习惯,操作人性化,界面美观。 

2.GPS导航:能够同时接收.处理GPS 信号,精确定位,手写地址搜索,多种路径规划,全屏触摸操作,语音导航提示,丰富的兴趣点功能 

3.蓝牙:能够搜索、连接平台附近的蓝牙设备,连接手机蓝牙时可以进行蓝牙免提通话等。 

4.电子书:能够阅读TXT格式电子书。 

5.音频功能:能够播放MP3、WAV、WMA等格式的音频文件。 

6.视频功能:能够播放WMV,AVI.ASF,MOV,MPG,3GP,FLV,MP4 等格式的视频文件。 

7.图片功能:能够播放BMP.JPG.GIF.PNG等格式的图片文件 

8.FM功能:独特的FM 调频发射功能:可以让导航提示语音、MP3、 MP4 都通过您的车载音响发出。 

9.TMC功能:智能交通导航技术,实时反映区域内交通路况,指引最佳最快捷的行驶路线,提高道路和车辆的使用效率。 

10.  AV  IN:支持视频输入,并可自动切换到倒车视频。 

11.  系统设置:能够设置平台的语言、背光度、音量、休眠、时间等功能。 

MSB2531A芯片主要性能指标:

»CPU: ARM Cortex-A7 32-bit RISC CPU,800MHz

»FPU coprocessor

»32KB I-cache and 32KB D-cache

»12KB boot ROM

»DRAM memory支持16-bit LPDDR和8-bit DDR3

»NAND interface支持i-NAND.Movi-NAND,SLC/MLC NAND FLASH,Up to 60-bit ECC

»USB 2.0 Host & DEVICE mode

»High Efficiency GPS baseband,GPS L1.C/A code,with all-in-view processing

»DGPS and WAAS capable

»Hardware Graphics Engine for responsive interactive application

»Analog audio stereo line in and mono Mic with Mic bias

»I2S/PCM digital audio/voice input and output interface

»Full-band FM radio Transmitter

»Up to 18 dedicated GPIOs for system control,4 UARTs.

»Built-in keypad SAR and touch panel 10-bit ADC.

»Package: 12.2x12.2(mm)298-ball LFBGA

基于GPS MSB2531A汽车电子方案.png

方案关键器件表

类型

型号

厂商

说明

DDR3

NT5CB128M8DN-DH

NANYA

DDR3

GPS

MSR2112

Mstar

GPS

SLC

TC58NVG0S3ETA00

TOSHIBA

SLC

DRIVER

MST701-LF

Mstar

DRIVER

导航

MSB2531A

Mstar

PND手持导航

SLC

EN27LN1G08-25TIP

EON

EN27LN1G08-25TIP

NT5CB128M8DN-DH参数

The 1Gb Double-Data-Rate-3 (DDR3/L) B-die DRAMs is double data rate architecture to achieve high-speed operation. Itis internally configured as an eight bank DRAM.

The 1Gb chip is organized as 16Mbit x 8 I/Os x 8 banks or 8Mbit x 16 I/Os x 8 bank devices. These synchronous devicesachieve high speed double-data-rate transfer rates of up to 2133 Mb/sec/pin for generalapplications.

The chip is designed to comply with all key DDR3/L DRAM key features and all of the control and address inputs aresynchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks

(CK rising and falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a sourcesynchronous fashion.

These devices operate with a single 1.5V ± 0.075V &1.35V -0.067/+0.1V power supply and are available in BGA packages.


MSR2112参数

The MSR2112 GPS/GLONASS RF receiver is a highly-integrated RFIC which employs a single down-conversion

radio architecture to translate L1 GPS/GLONASS signal down to a fixed low IF for digital sampling and

demodulation. The MStar GPS/GLONASS RFIC in conjunction with MStar advanced GPS/GLONASS baseband (BB)

processor offers the industry’s best performance and most cost-effective GPS/GLONASS solutions which are.suitable for mobile applications, such as handsets and personal digital assistants (PDAs).


TC58NVG0S3ETA00参数

he TC58NVG0S3E is a single 3.3V 1 Gbit (1,107,296,256 bits) NAND Electrically Erasable and Programmable

Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 1024blocks.

The device has two 2112-byte static registers which allow program and read data to be transferred between theregister and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single blockunit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages).

The TC58NVG0S3E is a serial-type memory device which utilizes the I/O pins for both address and data

input/output as well as for command inputs. The Erase and Program operations are automatically executed makingthe device most suitable for applications such as solid-state file storage, voice recording, image file memory for stillcameras and other systems which require high-density non-volatile memory data storage.


MST701-LF参数

The MST701 is a high quality ASIC for NTSC/PAL/SECAM Video Decoder application. It receives analog

NTSC/PAL/SECAM CVBS and S-Video inputs from TV tuners, DVD or VCR sources, including weak and distorted

signals, as well as analog YCbCr input from HDTV/SDTV systems. Automatic gain control (AGC) and 10-bit

3-channel A/D converters provide high resolution video quantization. With automatic video source and mode

detection, users can easily switch and adjust variety of signal sources. Multiple internal adaptive PLLs precisely

extract pixel clock from video source and perform sharp color demodulation. Built-in line-buffer supports

adaptive 2-D comb-filter, 2-D sharpening, and synchronization stabler in a condense manner. The output

format of MST701 supports CCIR656 TTL output for 480i, 576i, 480P, and 576P.

模拟信号输入全格式,

 4路CVBS

1路VGA

1路YCbCr或RGB

3通道10bit ADC

输出CCIR656

可直接驱动CCIR656接口的屏。

内置OSD字符



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