Renesas RA6M1 120MHz 32位ARM MCU开发方案
原标题:Renesas RA6M1 120MHz 32位ARM MCU开发方案
Renesas公司的RA6M1微控制器是瑞萨电子 RA6 产品系列的切入点,采用高效的 40nm 工艺,由开放且灵活的生态系统概念提供支持,即基于 FreeRTOS 的灵活配置软件包 (FSP),能够扩展以使用其他 RTOSes 和中间件. RA6M1具有120MHz 32位Arm® Cortex®-M4 内核,集成了512kB 闪存以及 256kB SRAM,以及与 EEPROM 存储数据功能类似的 8kB 数据闪存.具有电容式触摸传感单元,全速 USB 2.0,CAN 2.0B,SCI(UART,简单 SPI,简单 I2C),SPI/ I2C 多主机接口,SDHI和SSI/串行声音接口.适用于需要安全性,大型嵌入式 RAM 和低功耗的物联网应用如安全性(火灾探测,防盗检测,面板控制),计量(电力,自动抄表),工业(机器人,开门器,缝纫机,自动售货机,UPS)以及HVAC(供暖,空调,锅炉控制)和一般用途等.本文介绍了RA6M1主要特性,框图,以及评估板EK-RA6M1 v1主要特性,框图,电路图,材料清单和PCB设计图.
The MCU integrates multiple series of software- and pin-compatible Arm®-based 32-bit cores that share a common set of Renesas peripherals to facilitate design scalability and efficient platform-based product development.
The MCU in this series incorporates a high-performance Arm Cortex®-M4 core running up to 120 MHz with the following features:
512-KB code flash memory
256-KB SRAM
Capacitive Touch Sensing Unit (CTSU)
USBFS
SD/MMC Host Interface
Quad Serial Peripheral Interface (QSPI)
Security and safety features
12-bit A/D Converter (ADC12)
12-bit D/A Converter (DAC12)
Analog peripherals.
RA6M1主要特性:
■ Arm Cortex-M4 Core with Floating Point Unit (FPU)
Armv7E-M architecture with DSP instruction set
Maximum operating frequency: 120 MHz
Support for 4-GB address space
On-chip debugging system: JTAG, SWD, and ETM
Boundary scan and Arm Memory Protection Unit (Arm MPU)
■ Memory
512-KB code flash memory (40 MHz zero wait states)
8-KB data flash memory (125,000 erase/write cycles)
256-KB SRAM
Flash Cache (FCACHE)
Memory Protection Units (MPU)
Memory Mirror Function (MMF)
128-bit unique ID
■ Connectivity
USB 2.0 Full-Speed (USBFS) module
- On-chip transceiver
Serial Communications Interface (SCI) with FIFO × 7
Serial Peripheral Interface (SPI) × 2
I2C bus interface (IIC) × 2
CAN module (CAN) × 2
Serial Sound Interface Enhanced (SSIE)
SD/MMC Host Interface (SDHI) × 2
Quad Serial Peripheral Interface (QSPI)
IrDA interface
Sampling Rate Converter (SRC)
External address space
- 8-bit bus space
■ Analog
12-bit A/D Converter (ADC12) with 3 sample-and-hold circuits each × 2
12-bit D/A Converter (DAC12) × 2
High-Speed Analog Comparator (ACMPHS) × 6
Programmable Gain Amplifier (PGA) × 6
Temperature Sensor (TSN)
■ Timers
General PWM Timer 32-bit Enhanced High Resolution (GPT32EH) × 4
General PWM Timer 32-bit Enhanced (GPT32E) × 4
General PWM Timer 32-bit (GPT32) × 5
Asynchronous General-Purpose Timer (AGT) × 2
Watchdog Timer (WDT)
■ Safety
Error Code Correction (ECC) in SRAM
SRAM parity error check
Flash area protection
ADC self-diagnosis function
Clock Frequency Accuracy Measurement Circuit (CAC)
Cyclic Redundancy Check (CRC) calculator
Data Operation Circuit (DOC)
Port Output Enable for GPT (POEG)
Independent Watchdog Timer (IWDT)
GPIO readback level detection
Register write protection
Main oscillator stop detection
Illegal memory access
■ System and Power Management
Low power modes
Realtime Clock (RTC) with calendar and VBATT support
Event Link Controller (ELC)
DMA Controller (DMAC) × 8
Data Transfer Controller (DTC)
Key Interrupt Function (KINT)
Power-on reset
Low Voltage Detection (LVD) with voltage settings
■ Security and Encryption
AES128/192/256
3DES/ARC4
SHA1/SHA224/SHA256/MD5
GHASH
RSA/DSA/ECC
True Random Number Generator (TRNG)
■ Human Machine Interface (HMI)
Capacitive Touch Sensing Unit (CTSU)
■ Multiple Clock Sources
Main clock oscillator (MOSC) (8 to 24 MHz)
Sub-clock oscillator (SOSC) (32.768 kHz)
High-speed on-chip oscillator (HOCO) (16/18/20 MHz)
Middle-speed on-chip oscillator (MOCO) (8 MHz)
Low-speed on-chip oscillator (LOCO) (32.768 kHz)
IWDT-dedicated on-chip oscillator (15 kHz)
Clock trim function for HOCO/MOCO/LOCO
Clock out support
■ General-Purpose I/O Ports
Up to 76 input/output pins
- Up to 9 CMOS input
- Up to 67 CMOS input/output
- Up to 14 input/output 5 V tolerant
- Up to 13 high current (20 mA)
■ Operating Voltage
VCC: 2.7 to 3.6 V
■ Operating Temperature and Packages
Ta = -40°C to +85°C
- 100-pin LGA (7 mm × 7 mm, 0.65 mm pitch)
Ta = -40°C to +105°C
- 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)
- 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)
- 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)
图1. RA6M1框图
评估板EK-RA6M1 v1
Evaluation Kit for RA6M1 Microcontroller Group EK-RA6M1 v1
The EK-RA6M1 v1 enables developers to get started with initial firmware development.
• Renesas RA6M1 Microcontroller Group
R7FA6M1AD3CFP
100-pin LQFP package
120 MHz Arm® Cortex®-M4 core with Floating Point Unit (FPU)
256 KB SRAM
512 KB code flash memory
8 KB data flash memory
• Connectivity
A Device USB connector for the Main MCU
S124 MCU-based SEGGER J-Link® On-Board interface for debugging and programming of the RA6M1 MCU. A 10-pin JTAG/SWD interface is also provided for connecting optional external debuggers and programmers.
Two PMOD connectors, allowing use of appropriate PMOD compliant peripheral plug-in modules for rapid prototyping
Pin headers for access to power and signals for the Main MCU
• Multiple clock sources
Main MCU oscillator crystals, providing precision 12.000 MHz and 32,768 Hz external reference clocks Additional low-precision clocks are available internal to the Main MCU
• MCU reset push-button switch
• MCU boot configuration jumper
• General purpose I/O ports
One jumper to allow measuring of Main MCU current
Copper jumpers on PCB bottom side for configuration and access to selected MCU signals
• Operating voltage
External 5 V input through the Debug USB connector supplies the on-board power regulator to power logic and interfaces on the board. External 5 V or 3.3 V may be also supplied through alternate locations on the board.
• A two-color board status LED indicating availability of regulated power and connection status of the J-Link interface
• A red User LED, controlled by the Main MCU firmware
• A User Push-Button switch, User Capacitive Touch Button sensor, and an optional User Potentiometer, all of which are controlled by the Main MCU firmware
图2. 评估板EK-RA6M1 v1外形图:顶视图
图3. 评估板EK-RA6M1 v1外形图:底视图
图4. 评估板EK-RA6M1 v1框图
图5.电源选择图
评估板EK-RA6M1 v1材料清单:
责任编辑:David
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