原标题：ADI网络(CAN)解决方案

　　ADM3052在CAN协议控制器与物理层总线之间创建一个隔离接口。它能以最高1Mbps的数据速率工作。该器件的总线引脚(V+、V−、CANH和CANL)集成有接线错误保护功能。本方案可以快速开发ADM3052应用。

　　基本特征：

　　5 kV rms 隔离式CAN收发器

　　集成V+线性调节器

　　总线侧由V+和V−供电

　　工作电压(V+)：11 V至25 V

　　工作电压(VDD1：5V或3.3V

　　符合ISO 11898标准

　　最高1Mbps 高速数据传输率

　　总线引脚提供短路保护

　　集成总线接线错误保护

　　无电节点不干扰总线

　　总线支持110个或更多节点

　　方案特点：

　　The EVAL-ADM3052EBZ allows the ADM3052 isolated CAN transceiver to be quickly and easily evaluated. The evaluation board allows all of the input and output functions to be exercised without the need for external components.

　　On the EVAL-ADM3052EBZ, the power is isolated between a single 3.3 V or 5 V supply on VDD1, the logic side, and a single 24 V supply provided on V+, the bus side. R1, the 300 Ω external resistor, is used by the built-in linear regulator to share the power dissipation between R1 and the internal die to reduce the internal heat dissipation in the package.

　　The bus voltage sense pin (V+SENSE), detects when V+ is connected on the bus side. A low on V+SENSE indicates that power is available on the bus side, and a high on V+SENSE indicates that power is absent from the bus side.

　　VDD1 is the power supply of the logic side. A 22 μF decoupling capacitor, C5, is fitted between VDD1 and GND1. A capacitor of 1 μF is fitted on the CINT pin. A 100 nF capacitor, C6, is fitted between V+ and V−, and a 10 μF capacitor, C7, is fitted between V+R and V−.

　　An example operation of the EVAL-ADM3052EBZ is shown in Figure 3. Connect a signal generator on TXD and set up a 500 kHz square wave clock with output swing between 0 V and 5 V. Connect the scope probes to the CANH and CANL test points. A plot of the oscilloscope for TXD, CANH, and CANL is shown in Figure 2. Channel 1 shows the TXD signal, and Channel 2 and Channel 3 show the CANH and CANL signals, respectively.

　　原理图：

　　原理图1

　　PCB layout