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基于Microchip公司的MCP19114反激电源解决方案

来源: 中电网
2019-04-09
类别:电源管理
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文章创建人 拍明

原标题:Microchip MCP19114反激电源解决方案

  microchip公司的MCP19114/5是高度集成的混合信号低边同步控制器,包括模拟PWM控制器和用于LED照明系统,电池充电器和其它低边开关应用的MCU核,工作电压从4.5V到42V,主要用在消费类电子和汽车应用以及电源转换等.本文介绍了MCP19114/5主要特性,框图,MCU核框图以及多种典型应用框图, MCP19114反激评估板主要特性,电路图,材料清单和PCB元件布局图.

  The MCP19114/5 are highly integrated, mixed signal low-side synchronous controllers that operate from 4.5V to 42V. The family features an analog PWM controller with an integrated microcontroller core used for LED lighting systems, battery chargers and other low-side switch PWM applications. The devices feature an analog internal PWM controller similar to the MCP1631, and a standard PIC® microcontroller similar to the PIC12F617.

  Complete customization of device operating parameters, start-up or shutdown profiles, protection levels and fault handling procedures are accomplished by setting digital registers using Microchip’s MPLAB® X Integrated Development Environment software and one of Microchip’s many in-circuit debugger and device programmers.

  The MCP19114/5 mixed signal low-side synchronous controllers feature integrated programmable input UVLO/OVLO, programmable output overvoltage (OV), two low-side gate drive outputs with independent programmable dead time, programmable leading edge blanking (four steps), programmable 6-bit slope compensation and an integrated internal programmable oscillator for fixed-frequency applications. An integrated 8-bit reference voltage (VREF) is used for setting output voltage or current. An internal comparator supports quasi-resonant applications. Additional Capture and Compare modules are integrated for additional control, including enhanced dimming capability. The MCP19114/5 devices contain two internal LDOs. A 5V LDO is used to power the internal processor and provide 5V externally. This 5V external output can be used to supply the gate drive. An analog filter between the VDD output and the VDR input is recommended when implementing a 5V gate drive supplied from VDD. Two 4.7 μF capacitors are recommended with one placed as close as possible to VDD and one as close as possible to VDR, separated by a 10 isolation resistor.

  DO NOT exceed 10 μF on the VDD. An external supply is required to implement higher gate drive voltages. By utilizing Microchip’s TC1240A voltage doubler supplied from VDD to provide VDR, a 10V gate drive can be achieved. A 4V LDO is used to power the internal analog circuitry. The two low-side drivers can be used to operate the power converter in bidirectional mode, enabling the “shaping” of LED dimming current in LED applications or developing bidirectional power converters for battery-powered applications.

  The MCP19114 is packaged in a 24-lead 4 mm x 4 mm QFN. The MCP19115 is packaged in a 28-lead 5 mm x 5 mm QFN.

  The ability for system designers to configure application-specific features allows the MCP19114/5 to be offered in smaller packages than currently available in integrated devices today. The General Purpose Input/Output (GPIO) of the MCP19114/5 can be configured to offer a status output, a device enable, to control an external switch, a switching frequency synchronization output or input or even a device status or "heartbeat" indicator. This flexibility allows the MCP19114/5 packages and complete solutions to be smaller, thereby saving size and cost of the system printed circuit boards.

  With integrated features like output current adjust and dynamic output voltage positioning, the MCP19114/5 family has the best in class performance and highest integration level currently available.

  Power trains supported by this architecture include but are not limited to boost, flyback, quasi-resonant flyback, SEPIC, Ćuk, etc. Two low-side gate drivers are capable of sinking and sourcing 1A at 10V VDR. With a 5V gate drive, the driver is capable of 0.5A sink and source. The user has the option to allow the VIN UVLO to shut down the drivers by setting the UVLOEN bit.

  When this bit is not set, the device drivers will ride through the UVLO condition and continue to operate until VDR reaches the gate drive UVLO value. This value is selectable at 2.7V or 5.4V and is always enabled. An internal reset for the microcontroller core is set to 2.0V. An internal comparator module is used to sense the desaturation of the flyback transformer to synchronize switching for quasi-resonant applications.

  The operating input voltage for normal device operation ranges from 4.5V to 42V with an absolute maximum of 44V. The maximum transient voltage is 48V for 500 ms. An I2C serial bus is used for device communications from the PWM controller to the system.

  MCP19114/5主要特性:

  • Input Voltage: 4.5V to 42V

  • Can be configured with Multiple Topologies including but not limited to:

  - Flyback

  - Ćuk

  - Boost

  - SEPIC (Single-Ended Primary-Inductor Converter)

  • Capable of Quasi-Resonant or Fixed-Frequency Operation

  • Low Quiescent Current: 5 mA Typical

  • Low Sleep Current: 30 μA Typical

  • Low-Side Gate Drivers:

  - +5V Gate Drive

  - 0.5A Sink/Source Current

  - +10V Gate Drive

  - 1A Sink/Source Current

  • Peak Current Mode Control

  • Differential Remote Output Sense

  • Multiple Output Systems:

  - Master or Slave

  • Configurable Parameters:

  - VREF, Precision IOUT/VOUT Set Point (DAC)

  - Input Undervoltage Lockout (UVLO)

  - Input Overvoltage Lockout (OVLO)

  - Detection and Protection

  - Primary Current Leading Edge Blanking (0,

  50 ns, 100 ns and 200 ns)

  - Gate Drive Dead Time (16 ns to 256 ns)

  - Fixed Switching Frequency Range: 31.25 kHz to 2.0 MHz

  - Slope Compensation

  - Quasi-Resonant Configuration with Built-in Comparator and Programmable Offset Voltage Adjustment

  - Primary Current Offset Adjustment

  - Configurable GPIO Pin Options

  • Integrated Low-Side Differential Current Sense Amplifier

  • ±5% Current Regulation

  • Thermal Shutdown

  Microcontroller Features:

  • Precision 8 MHz Internal Oscillator Block:

  - Factory-calibrated to ±1%, typical

  • Interrupt Capable

  - Firmware

  - Interrupt-on-Change Pins

  • Only 35 Instructions to Learn

  • 4096 Words On-Chip Program Memory

  • High Endurance Flash:

  - 100,000 write Flash Endurance

  - Flash Retention: >40 years

  • Watchdog Timer (WDT) with Independent Oscillator for Reliable Operation

  • Programmable Code Protection

  • In-Circuit Serial Programming™ (ICSP™) via Two Pins

  • Eight I/O Pins and One Input-Only Pin

  - Two Open Drain Pins

  • Analog-to-Digital Converter (ADC):

  - 10-bit Resolution

  - Five External Channels

  • Timer0: 8-bit Timer/Counter with 8-bit Prescaler

  • Enhanced Timer1:

  - 16-bit Timer with Prescaler

  - Two Selectable Clock Sources

  • Timer2: 8-Bit Timer with Prescaler

  - 8-bit Period Register

  • I2CTM Communication:

  - 7-bit Address Masking

  - Two Dedicated Address Registers

  图1. MCP19114/5反激同步准谐振框图

  图2. MCP19114 CUK同步正输出应用框图

  图3. MCP19114 CUK升压准谐振应用框图

  图4. MCU核框图

  MCP19114反激评估板

  The MCP19114-Flyback Standalone Evaluation Board and Graphical User Interface (GUI) demonstrate the MCP19114 performance in a synchronous Flyback topology. It is configured to regulate load current, and is well suited to drive LED loads. Nearly all operational and control system parameters are programmable through the integrated PIC MCU core. The MCP19114 evaluation board comes preprogrammed with firmware designed to operate with the GUI interface. Microchip’s MPLABX IDE (Integrated Development Environment) can be used to develop and program user-defined firmware, thus customizing it to the specific application. The evaluation board contains headers for ICSPTM (In-Circuit Serial Programming) as well as I2C™ communication. Several test points have been designed into the PWB for easy access and development purposes. The MCP19114-Flyback Standalone Evaluation Board also demonstrates an optimized PCB (Printed Circuit Board) layout that minimizes parasitic inductance, while increasing efficiency and power density. Proper PCB layout is critical to achieve optimum MCP19114 operation as well as power train efficiency and noise minimization.

  图5. MCP19114反激评估板框图

  MCP19114反激评估板主要特性:

  • Ceramic and bulk capacitors on the input reduce RMS ripple current and tame input voltage deviation caused by load transients

  • Ceramic capacitors on the output reduce voltage ripple and provide energy to the output while the primary side is being re-energized

  • PC software provides simple interface to evaluating the evaluation board

  • Vin range: 8V to 14V

  • Adjustable Vout range: 0V to 50V

  • Maximum output current: 500mA with proper air flow

  • Programming and I2C communication headers

  • The factory programmed source code is available

  MCP19114反激评估板材料清单:




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